20051111 Friday November 11, 2005

Don't Become Moore Confused (Or, The Death of the Microprocessor, not Moore's Law)

It was great to see that Gordon Moore got to deliver his “40 years later” talk at the Computer History Museum. I hope, though I know in vain, that at last everyone now understands what Moore's Law actually predicts --- and more importantly, what it doesn't. It is a prediction about the doubling of the number of transistors on an integrated circuit, about every 24 months.

It isn't a prediction about the speed of computers.

It isn't a prediction about their architecture.

It isn't a prediction about their size.

It isn't a prediction about their cost.

It is a prediction about the number of transistors on a chip. Full stop. That's it.

Let's take this one at a time. But, first, a little math for the exponentially challenged. In 40 years there are 20 24-month periods. 2^20 is about one million. A bit of revisionism calls the doubling time 18 months. In that scenario, there are about 26.6 doubling times, or a factor of about 100 million. Let's just split the difference (logarithmically) and say that we've got about 10 million transistors on a chip today for every one we had 40 years ago. In any case, the biggest chips we build today are about 500 million transistors.

Okay, what about speed? A fundamental misconception is that Moore's Law predicts that computer speed will double every 18 to 24 months. Worse, since a very large West coast semiconductor company decided to market the equation that clock speed = performance, I can't tell you how many times I have had the question “With all of the power and heat problems with microprocessors, it looks like clock rates have maxed out or (gasp) have actually slowed down. Are we seeing the end of Moore's Law?” I used to scream. Now I just sigh.

No. Gordon said nuttin 'bout clock rates. And a little data shows how ridiculous that would be. The IBM 360 System 91 (vintage 1967) had a clock rate of 10 Mhz. Ten million times that would mean that today's microprocessors should clock at 100 Thz, or about 10,000 times faster than the fastest clocked chips today.

Size? Well, this is fuzzy enough to say “yes and no.” At the computer level, the answer is firmly “no.” An average industrial refrigerator-sized computer of the late sixties was under 10 cubic meters. Today's 1-2RU rack-mounted server is in the neighborhood of 0.01 cubic meters. That's only a factor of a 1000. Now at the processor level, it depends upon what kind of packaging you consider. Looking at bare dice, you can get close to a factor of 10 million, but this kind of analysis is more about the number of transistors on a chip --- which is Moore's Law.

Cost? Certainly not. A usable server is about $1000 today. Even with generous inflation adjustment, this still translates to a $1B (1970), which is ridiculous. Before you fire off a flame to me about $1.50 microcontrollers and five-cent RFID tags, I'll point out that there were plenty of low cost computers in the late sixties and early seventies. Think of PDP-8's. And remember the first calculators in the mid-seventies? HP and TI had low-cost, programmable, battery-powered (coat)pocket-sized offerings for only a few hundred dollars.

Moore's Law is about transistors. I can print a chip today that has almost a billion transistors on it. Let's look at that more closely. Our first version of SPARC was constructed from about a 100,000 transistor ASIC. So today we could fit TEN THOUSAND of our original SPARC microprocessors on a single chip. That, gentle readers, is interesting.

It's interesting because, today at least, we don't put 10,000 processors on a single chip. What we did do with the gift of transistor doubling was to continuously reinvest them into to building bigger and badder (and more power-hungry) single processors. Not a lot of architectural innovation I might add. We basically were taking many of the ideas pioneered in the sixties (mostly invented at IBM; see the ACS, Stretch, and 360/91 and compare them with “modern” microprocessors) and re-implemented them on single pieces of silicon.

We took discrete processors and integrated them into microprocessors. The serious displacement of discrete systems (bipolar TTL and ECL) started in 1985 and by 1990 it was all over. The discrete processor-based systems, from minicomputers to mainframes to supercomputers, all died, being replaced by microprocessor-based designs.

Now here we are 20 years later. We have squeezed all of the blood from that stone. We're done. Actually, we over-did it. Continuing to throw transistors at making single processors run faster is a bad idea. It's kinda like building bigger and bigger SUVs in order to solve our transportation problems. As I said, a bad idea.

A direct consequence of pursuing this bad idea is that, like gigantic SUVs, the energy efficiency of our biggest and fastest microprocessors is horrible. Meaning, we get very poor computing return for every watt we invest. Outside of portable applications, this extreme energy wasting has really only become a concern when the industry realized that it was getting very difficult to remove the waste heat --- to cool the engine, as it were.

(Another consequence is that these complex microprocessors are, well, complex. That means more engineers to create the design, more engineers to test that the design is correct, and whole new layers of managers to try to coordinate the resulting hundreds and hundreds of folks on the project. Bugs increase, schedules are missed, and innovation actually decreases.)

The result: microprocessors are dead.

Just as the '80's discrete processors were killed by microprocessors, today's discrete systems --- motherboards full of supporting chip sets and PCI slots with sockets for microprocessors --- will be killed by microsystems: my word for the just-starting revolution of server-on-a-chip. What's that? Pretty much what it sounds like. Almost the entire server (sans DRAM) is reduced to a single chip (or a small number of co-designed ones, just as the first micros often had an outboard MMU and/or FPU). These microsystems directly connect to DRAM and to very high speed serialized I/O that are converted to either packet or coherent-memory style network connections.

Open up the lid of a microsystem and you'll find a full SMP : multiple processor cores, crossbar switches, multi-level caches, DRAM and I/O controllers. Our Niagara chip, for example, has eight cores (each four-way threaded), a caching crossbar switch, four memory controllers, and a high speed I/O channel. And its performance is very competitive with our original E10K, the 64 processor behemoth that stormed the world as the first high-volume, enterprise class, massive multiprocessor.

Moore's Law is VERY much alive. And as Marc Tremblay puts it, with Niagara, it's as if we have leapt forward one, or even two, generations of integration.

The secret was to turn the clock back --- figuratively and literally --- to earlier, more sane processor pipeline designs. Ones that were more conservative of transistors, area, power, and complexity. (A key innovation, however, was to finally fold multithreading into the individual pipes). With these smaller, leaner and far more power-efficient processor cores, we could then use the transistor count advance of Moore's Law to paste down many of them on the same die, and to integrate the rest of the SMP guts at the same time.

The result is a chip that is incredibly hot performance-wise, and way cool thermally speaking. Truly an awesome accomplishment.

Incidentally, Opteron is a microsystem, too. You can get a couple of cores, integrated memory controller, and a set of smartly architected serial network ports (hypertransport) that bridge to I/O systems, or directly connect to other Opterons. Our good friends at AMD are actively killing the microprocessor with Opteron. From our vantage, they are still leaving a lot of potential performance on the table (and power efficiency as well) by not reducing core complexity and adding aggressive multithreading. That being said, Opteron is seriously spanking Xeon with the lower memory latency benefit of on-chip DRAM controllers.

Where does end up? Well, we are now dying to get to 65nm (Niagara is 90nm) so we can get even more transistors on a chip in order to integrate more and bigger systems. Just as the microprocessor, harvested the pipeline inventions of 60's and 70's, microsystems are going to integrate the system innovations of the 80's and 90's.

By 2010 microprocessors will seem like really old ideas. Motherboards will end up in museum collections. And the whole ecology that we have around so-called industry standard systems will collapse as it becomes increasingly obvious that the only place that computer design actually happens is by those who are designing chips. Everything downstream is just sheet metal. The apparent diversity of computer manufactures is a shattered illusion. In 2010, if you can't craft silicon, you can't add value to computer systems. You'd be about as innovative as a company in the 90's who couldn't design a printed circuit board.

Thanks, Gordon.

( Nov 11 2005, 09:16:57 AM PST ) Permalink Comments [341]

Trackback URL: http://blogs.sun.com/Gregp/entry/don_t_become_moore_confused
Comments:

Good post -- I personally would go farther than pre-defined micro-systems. I've put a couple of points over at: http://kendes.blogspot.com/2005/11/future-of-performance.html

Posted by Ken Horn on November 11, 2005 at 01:10 PM PST #

Greg, A fine posting, NIAGARA will be a welcome addition to Mr. Tremblay's technical achievements. Thankfully, SUN continues to evolve 'throughput' computing. Recall, a novel CPU may be an innovation filled wonder hampered by inferior surroundings!

Posted by William R. Walling on November 11, 2005 at 01:44 PM PST #

Very good post, Greg. At the end the next logical step seems to be a Niagara out of several Niagaras. Perhaps coupled with on-chip-hypertransport or on-chip-infiniband ... And the following modell a Niagara out of Niagaras out of Niagaras ... ad infinitum ...

Posted by Jörg Möllenkamp on November 19, 2005 at 04:57 AM PST #

An added example of this evolution to microsystems is on AMD's CPU-roadmap (see the latest analyst day): on-chip co-processors. It's quite a vague statement, but it could be all kinds of cool stuff: general purpose DSP's, SSL accelerators, TCP/IP Offloading engines, audio processors, physics processors, some kind of vector-based core for media processing, ... (grabbing the more popular ideas in current speculation). And people are complaining it's boring in CPU-land ... :).

Posted by Bart Swinnen on November 19, 2005 at 06:16 PM PST #

Great post. You state 2010, are you poitive about that figure? I know AMD wants to integrate PCIe, and Intel is trying to get a memory controller on there by 2007, my whole view on this is that the gaming market pushes the latest in technology. With the soon to be introduction of a PPU (Physics Processing Unit) are we taking a step backwards from your point of view?

Posted by Stefan Constantinescu on November 20, 2005 at 12:46 PM PST #

Great post! It seems to me that the technical "execution" challenges lie in the verification and diagnostics area. 1 node in 500million*3 (3 free nodes per xtor) is a 1 ppb failure rate requirement for the CMOS platform technology of choice? What penalties would we be paying in terms of product development cycle times i.e., time to prove manufacturability, quality and reliability for the CPU? How do we strategize the product/test flow, test algorithms? Does it re-emphasize the need for "short-loop" semiconductor yield learning cycles during CPU development? Regards, Sri

Posted by Anon on November 22, 2005 at 09:58 PM PST #

Brilliant vision! Regarding "In 2010, if you can't craft silicon, you can't add value to computer systems" - we're even clcoser to that point in the embedded systems world. DVD players went through stages of: a bunch of custom chips -> a bunch of kinda general-purpose chips -> a couple custom chips -> one custom chip. Note that in that space theere are companies out there that help non-silicon-crafting companies (software firms) to craft their own silicon for them. In particular, Tensilica's customizable cores that let people easily add instructions was very useful in letting my previous software company get a chip extended specifically for our software despite us having no hardware knowledge.

Posted by RMX on November 29, 2005 at 10:17 AM PST #

Great post! Although I think the microsystem concept is not a new idea. Not at least in the "non-computer" world of embedded microchip applications. What about the PIC microcontrollers that are offering IO ports, on-board ram and cpu power in a single chip? More importantly, NOKIA and other mobile phone manufacturers are using at least since 1999 multiple-core ASICS, that include an ARM7 cpu, TI DSP and all the system logic needed to coordinate the whole mobile device. The other chips in the phone PCB are only about flash memory/dram and power management issues (apart from the RF part). The years-old TI OMAP chip, aimed at mobile devices too, is a similar example. Again great post

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