In a Nutshell: Nehalem-EP -Part1

Our Partner Intel launched www.intel.com/pressroom/ it's eagerly awaited new architecture yesterday including Intel's Xeon processors 5500 series.





The 1-2 socket Nehalem-EP (Efficient Performance) aka Tylersburg-EP comes with some nice capability on top of the integrated memory controller, DDR3, and increased memory bandwidth. Added features include but not limited to QPI (formerly CSI), Turbo Mode, and Hyper-Threading.



www.sun.com/x64/intel/

So a little on one or two of these new technologies without writing a book. Intel® QuickPath technology (QPI) is the next generation point-to-point interconnect for CPUs and chipsets. It's used to connect socket-to-socket, socket-to-IO, and carries upto 6.4 GigaTransfers per second per link each direction.





Hyper-Threading Technology provides the ability for each core to run simultaneous multiple software threads and supports 2 threads per core. Turbo Boost technology will increase the speed of the processor on demand (from OS) if the CPU is operating below power /thermal specifications. So by quiescing unused cores, it's possible to over clock the busy core(s) a max of 3 speed bins remaining within the thermal envelope.




The processors come in three flavors Value, Volume and Performance www.intel.com/5500/:

Value offers 2-4 cores, 4MB L3 Cache, 4.8GT/s QPI, 800MHz Max Memory speed and doesn't support Turbo Mode or HyperThreading. Volume (or Standard) delivers 4 cores, 8MB L3 Cache, 5.86GT/s QPI, 1066MHz Max Memory speed and supports Turbo Mode (upto 2 bins) and HyperThreading. Performance delivers 4 cores, 8MB L3 Cache, 6.4GT/s QPI, 1333MHz Max Memory speed and supports Turbo Mode (upto 3 bins) and HyperThreading.

It's important to note that Hyper-Threading and Turbo Mode are configured in the BIOS along with many other performance effecting settings like NUMA, Pre-fetchers, and RTID allocation. For performance optimization make sure the required memory modules are selected at the correct speed to match your CPUs.

Each socket has 6 or 9 DIMMs (3 channels, 2 or 3 DIMM slots per channel) and memory placement is critical. Each slot is color coded with Blue for slot 0 in the channel, White is slot 1 in the channel, and Black is slot 2 in the channel. Populate first each slot FURTHEST from the CPU socket in each channel (Blue slots). More on Memory Population Rules to follow.

And finally, with any new architecture check for OS certifications as not all versions will be supported regardless of your chosen flavor.

More to follow on April 14th......http://www.sun.com/launch April 14th/

-InsomniacsAnonymous
www.sun.com/x64/intel/

Posted by 142258 [x64 Systems] ( March 31, 2009 09:55 AM ) Permalink | Comments[0]