The same strategy that tamers use with dogs and speakers use to claim audience attention worked on me this morning. I was reading a blog entry called “Open Source Hardware - or - OpenSPARC as a platform for instruction" at Gery Serda's blog. It is a very interesting entry, he talks about OpenSPARC T1 and OpenSPARC T2 architectures, and the benefits for academic institutions to have now open source hardware too available.

Near to the finish he gives a link to OpenSPARC Internals e-book download, edited by David Weaver. It was the gift I was talking about.

Ok, I admit, I have an unusual love for e-books.

Books are one of the bests ideas ever. Pick a subject, choose some good authors, read cover to cover and you are now one of the specialists on the subject.  I see e-books as something that helps the democratization of knowledge.

Here are the highlights of the book:

• How to customize and use OpenSPARC

• How to start using OpenSPARC code

• How to make basic changes including

  • configuring number of cores or threads

  • paring to a smaller size

  • fitting on an FPGA

  • adding extensions

• How to set up

  • simulation environment

  • emulation environment

• How to verify an OpenSPARC design

Here some professors quotes:

"The coverage is extremely broad and deep, from the basics of the OpenSPARC architecture, the rationale for throughput optimized microprocessor design, and the microarchitecture of the T1 and T2 implementations to a roadmap for using the T1 and T2 design database and design verification suites."
Kunle Olukotun, Stanford University
Professor, Electrical Engineering & Computer Science
Director, Pervasive Parallelism Lab

For those of you who doesn't know this great piece of lecture written mainly by John L. Hennessy and David A. Patterson, It is a bible for computer architectors and hardware designers. Marc Tremblay, Fellow and VP, Chief Architecture from Sun Microsystems stated "Computer Architecture builds on fundamentals that yielded the RISC revolution, including the enablers for the CISC translations. Now, in this new edition, it clearly explains and gives insight into the latest microarchitectures techniques needed for the new generation of multithreaded multicore processors".

The fourth edition of the book is divided into six chapters and three printed appendices, and more nine appendices on CD.

The chapters are Fundamentals of Computer Design; Instruction-Level Parallelism and Its Exploitation; Limits on Instruction-Level Parallelism; Multiprocessors and Thread-Level parallelism; Memory Hierarchy Design; Storage Systems.

It's good to read a good book. =) 

Chapter Four is specially interesting because It's about multiprocessors and thread-Level parallelism and It uses Sun T1 microprocessor as example.

I made some slides of the sections of chapter 4, one per section.

I'm posting It here, and you can download It through SlideShare. It's a work in process of course, but It's a good start.