Dhanaraj M

Solaris - Tickless Kernel Architecture

In order to save power, CPUs can be kept in a low power state (only when the CPU is IDLE).
This can be achieved through Tickless kernel architecture. Hence, the clock cyclic fires
based on events rather than periodically for every tick.

For more details about the project, visit here
CR 6567390 clock efficiency optimizations ('tickless' clock)
CR 6875377clock() service decomposition

This project is divided into several tasks
# Callout / Timeout Re-implementation
    - Integrated into snv_103, tracked by CRs 6565503 (Discussed in my previous blog)
# clock() decoupled lbolt / lbolt64
# Event based historical load average implementation
# Software PLL time adjustment / NTP, tod migration
# Tick processing, Tick accounting
    - CR 6860423 thread tick accounting and time slice enforcement needs to be tickless

Posted at 02:00PM Aug 25, 2009 by dhanarajm in Sun  |  Comments[0]