My last post was announcing the Innovation Awards Contest, now after a few months we announced our winners last week. Many great entries were submitted, our panel of judges reviewed them all and picked the winners. There is great things happening in the community and here we see entries from academia and from industry. We thank everyone for participating and for the effort and contributions made. Sun awarded $135,000 to the OpenSPARC Community Innovation Awards Contest winners. We look forward to next year and hope to see many more contributions.
The winners of the OpenSPARC Community Innovation Awards Contest designed to fuel innovation around chip technology. The contest was part of Sun's Open Source Community Innovation Awards Program, a multi-year program running across several open source communities with a $1 Million total prize.
The OpenSPARC Contest Award categories and winners include the following:
- Grand Prize - Martin Johansson, Jiri Gaisler of Gaisler Research
- Best University Level Computer Architecture and/or VLSI course - Mark McDermott, Professor at the University of Texas, Austin
- Best New Bus Interface Creation as a contribution to the OpenSPARC community - Martin Johansson, Jiri Gaisler of Gaisler Research
- Best Demo of an Application running on an FPGA - Martin Johansson, Jiri Gaisler of Gaisler Research
- Best Adaptation of a Single-thread Application to a Multi-thread CMT Environment - Andrey Brito, PhD student at the Systems Engineering Group at the Dresden University of Technology in Germany.
- Best submission that makes a substantial contribution to the OpenSPARC community and does not constitute any of the other mentioned categories - Kushal Datta, Graduate student at University of North Carolina
Listen to the podcast with the grand prize winners
Go here for details on the winners and their contributions
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OpenSPARC Community Innovation Awards Contest
The OpenSPARC Community Innovation Awards Contest is part of Sun's $1 Million Open Source Community Innovation Awards Program, and will be responsible for awarding $175,000 of the $1 Million total prize. The contest runs from January 28 until June 30, 2008. Contest submissions will be judged during the month of July, and awards will be given out during the month of August.
The OpenSPARC Community Innovation Awards Contest is part of Sun's $1 Million Open Source Community Innovation Awards Program, and will be responsible for awarding $175,000 of the $1 Million total prize. The OpenSPARC Contest awards categories and award amounts are as follows:
OpenSPARC Contest categories and award amounts:
- A. Grand Prize: $35,000
- B. First Prizes: ($20,000 each category)
- i.Best University level Lab Project based on OpenSPARC:
- ii. Best University level Computer Architecture and/or VLSI course
- iii. Best Architecture White paper or Application Notes
- iv. Best New Bus Interface creation as a contribution to the OpenSPARC community
- v. Best Demo of an application running on an FPGA
- vi. Best Adaptation of a single-thread application to a multi-thread CMT (Chip Multi Threaded) environment
- vii. Best submission that makes a substantial contribution to the OpenSPARC community and does not constitute any of the above described Categories
The Grand Prize winner will also be the First Prize Winner in the Category for which the Entry was submitted.
The OpenSPARC Contest will be judged by the OpenSPARC Contest Jury Panel, a group of OpenSPARC industry experts selected from within the OpenSPARC community representing a diverse background of expertise and experience.
- Fred DeSantis, retire technology executive, former Vice President, SPARC Volume Processors, Sun Microsystem's Microelectronics Group
- Renu Raman, Executive-in-Residence, Tallwood Venture Capital
- Professor Jose Renau, University of California, Santa Cruz, Department of Computer Engineering
- Paul Hartke, Xilinx University Program, Xilinx Corporation
- Professor Preeti Ranjan Panda, Department of Computer Science & Engineering, Indian Institute of Technology, New Delhi
- Peggy Aycinena, Editor, EDA Confidential & Contributing Editor EDA Weekly
Please read the complete contest rules.
for more information and the full contest rules and regulations.
We attempted to make this contest available to all countries across the
globe, but due to various laws of many countries, we were restricted in
which countries that this contest is offered in.
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OpenSPARC T2 version 1.1 was just released. New Features in release 1.1 include:
- Included Network Interface Unit (NIU) source code in the distribution.
- OpenSPARC T2 System-on-chip (SoC) micro-architecture document has a new chapter on NIU. The document now is also divided in two volumes to reduce the size of the each book.
- Verification and synthesis are now supported on x64 hardware platform running on GNU kernel Linux 2.6 and above
- Simulation environment now also supports Cadence NC-Verilog simulator. It is still required to have Synopsys Vera for the testbench components written in Vera language.
- SPARC Architecture Model (SAM) now supports Solaris operating system running on x64 hardware platform
- SAM has new user interface for better usability and more functionality
- Fix Open Boot PROM (OBP) build script for niagara1-hw and niagara2-hw platforms
Released on May 10, was version 1.6 of OpenSPARC T1. New Features in the release 1.6 are:
- T1 core supports single- and four-thread options on FPGAs
- Reference designs boot OpenSolaris on single- or four-thread mode
- Xilinx Virtex-5 technology support
- Networking (ftp, telnet) support
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It's taken a while for us to update the OpenSPARC cvs repository. Its a huge amount of data and now it's finally available and contains all the releases. Access to the source code repository can be done in one of following ways:
- Browse the source code online:
OpenSPARC T1 or OpenSPARC T2 - Check out source code with a CVS client using the following commands. Note: replace username with your own username. Register for an account on sunsource.net, if you don't have one already.
cvs -d :pserver:username@cvs.sunsource.net:/cvs login
followed by
cvs -d :pserver:username@cvs.sunsource.net:/cvs checkout -ropensparc-t1/src
without -r the latest release is retrieved
or
cvs -d :pserver:username@cvs.sunsource.net:/cvs checkout -ropensparc-t2/src
without -r the latest release is retrieved
OpenSPARC T1
Updated with Release 1.6| Release | Tag | Size (MB) | # dirs | # files | # binaries |
| 1.0 | REL_1_0_0 | 650 | 2037 | 21714 | 5699 |
| 1.0.1 | REL_1_0_1 | 650 | 2037 | 21718 | 5699 |
| 1.1 | REL_1_1_0 | 650 | 2086 | 21881 | 5703 |
| 1.2 | REL_1_2_0 | 654 | 2148 | 22149 | 5713 |
| 1.3 | REL_1_3_0 | 714 | 2389 | 25234 | 7066 |
| 1.4 | REL_1_4_0 | 719 | 2408 | 25304 | 7094 |
| 1.5 | REL_1_5_0 | 767 | 2462 | 25430 | 7101 |
| 1.6 | REL_1_6_0 | 853 | 2475 | 25527 | 7107 |
OpenSPARC T2
| Release | Tag | Size (MB) | # dirs | # files | # binaries |
| 1.0 | REL_1_0_0 | 1531 | 2635 | 40770 | 8159 |
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UltraSPARC T1 - Click to enlarge
UltraSPARC T2 - Click to enlarge
The UltraSPARC T2 Plus is the latest CMT processor and the Sun SPARC Enterprise T5140 and T5240 are the first systems to use this processor. The UltraSPARC T2 Plus is essentially an UltraSPARC T2 but includes multi-chip coherence links which allows systems to be built that use 2 or 4 of these processors together in one system.
You can read about the details of the UltraSPARC T2 Plus codenamed Victoria Falls made during a presentation at the HOT CHIPS 19 which was held on August 20-21, 2007, Stanford, CA. Victoria Falls - Scaling Highly Threaded Processor Cores
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Sun is sponsoring a contest with significant prizes for innovative development using OpenSPARC! (similar contests are being announced for other open-source technologies from Sun) Read the press release: Sun Announces Open Source Community Innovation Awards Program.
The OpenSPARC team will be finalizing the OpenSPARC Community Innovation Awards Contest categories and selection criteria next week, and would like to get input from the OpenSPARC community on what categories should be awarded and what criteria the judges should use to determine the winners of each category. Please make your submissions for categories specific and actionable.
For example: Category is "Best Functional Enhancement (Co processor or ISA)"
This would encourage development of interesting co processors or
instruction-set extensions.
Examples: high-bandwidth network controller, crypto unit, transactional memory, graphics instructions (perhaps for use in a game console), DSP functionality (perhaps for use in a high-end imaging device).
Another example: Category is "Best Architecture White paper or Application Notes" This would encourage writing 10-20 page white papers describing interesting technical issues around OpenSPARC multi-core architectures, multi-thread designs, and innovative interfaces into the OpenSPARC architecture.
Remember, each category needs to be able to be judged by the Contest Panel of judges in an objective and efficient fashion. Expect that each category will award prizes (potentially 1st, 2nd and 3rd prize) in the amount of between $1,000 US up to $15,000 US. There is a possibility of awarding a Best of Breed Grand Prize.
Please send you ideas to Steve Rudinsky (steve.rudinsky@sun.com) no later than Wednesday, December 19th, 2007.
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- OpenSPARC home page
- OpenSPARC T2 specifications
- OpenSPARC T2 source code (RTL) and related software tools
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In the Americas:
MICRO-40 - The 40th Annual IEEE/ACM International Symposium on Microarchitecture, 2007 - http://www.microarch.org/micro40/In Europe:
December, 1-5, 2007 Chicago, Illinois
OpenSPARC - A Scalable Chip Multi-Threading Design
Tutorial - December 1, 1:30-5pm
IP 07 - http://www.design-reuse.com/ip07/In Asia-Pacific Rim:
December 5-6, 2007 Grenoble, France
Panel: Open core programs
December 5, 16:30-17:30
VLSI 2008 - 21st International Conference on VLSI Design - http://vlsiconference.com/vlsi2008/
January 4-8, 2008 Hyderabad, India
OpenSPARC Tutorial- - A scalable Chip Multi-Threading Design
January 5, 2008
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FAQ: http://www.opensparc.net/faqs/opensparc-t2/
OpenSPARC T2 Specifications released: http://www.opensparc.net/opensparc-t2/index.html\
Next opportunity to look at the OpenSPARC T2 RTL code will be when its released. (which will not be too long from now)
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The OpenSPARC.net now has four RSS/Newsfeeds:
Front Page / Whats New
News
Blogs
Events
Code has also been added so that Firefox can auto detect a feed, and provide a shortcut for subscribing. So if your using FireFox you can just click on the rss icon. Look here for a description of this feature. Having the right tool to read Newsfeeds is very useful and my favorite is BlogBridge.
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Sun SPARC Enterprise T5120
Sun SPARC Enterprise T5220
Sun Blade T6320 Server Module
These systems are based on the UltraSPARC T2, with eight cores and 64 threads on one chip, integrated 10 GbE networking, crypto, and PCI-Express expansion based on Chip MultiThreading architecture.
Sun has released the detailed technical documentation on the UltraSPARC T2, including the UltraSPARC T2 Processor Programmer's Reference Manual and Microarchitecture Specification. This allows developers to gain an in-depth understanding of the architecture and allows porting of operating systems and application development.
Sun plans to make the UltraSPARC T2 microprocessor design openly available under the name, OpenSPARC T2. Right now the OpenSPARC T2 is available under an beta review program - This program provides early access to a limited number of hardware designers and tool developers to begin working with the state-of-the-art CMT processor with server on a chip functionality. We hope the program will catalyze the development of a community for OpenSPARC T2, speed the debugging process and leads to a better first release of the technology. Sign-up for the OpenSPARC T2 Beta Program now, it will be closing soon. Make sure you provide as much detail as possible in your beta request, its critical in the selection process.
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Within this release for the first time, there is support for an OpenSPARC T1 FPGA system with UART and DRAM controllers. It also supports the entire Xilinx tool chain for building new FPGA systems using OpenSPARC T1.
On this platform, you can map single thread T1, add right peripherals and then boot Hypervisor. You can also run standalone C program without the OS. Complete documentation and an entire new verification environment are also included as part of this release.
These new features are designed to enable a user to build real systems using the OpenSPARC T1 core. For further details on Xilinx, please refer to the Xilinx University program and information on the ml410 board.
Watch the video demonstration below and Download it!
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We intend to open source the UltraSPARC T2 as OpenSPARC T2. An OpenSPARC T2 beta review was announced. This program provides early access to a limited number of hardware designers and tool developers to begin working with the state-of-the-art CMT processor with server on a chip functionality. The program catalyzes the development of a community for OpenSPARC T2, speeds the debugging process and leads to a better first release of the technology.
Sign-up for the OpenSPARC T2 Beta Program. Please be as completed as possible in your submission, there has been a lot of interested already and we are going to select just a small group from the total number of candidates.
Visit the OpenSPARC.net website. Let me know if you like the new look and feel.
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