David Weaver

Intro to UltraSPARC Architecture -- #2

(this blog entry is cross-posted in the OpenSPARC General Forum )

Sun's new Niagara ("UltraSPARC T1") processor is not only a new implementation, but the first implementation of a much-enhanced processor architecture, which we've named simply the "UltraSPARC Architecture". To reflect that it's a living architecture, we've named the first version of the architecture spec UltraSPARC Architecture 2005. The date in the name gives an indication of when that revision of the architecture was released.

Note that the full UltraSPARC Architecture 2005 document is posted on the web (at http://opensparc.sunsource.net/nonav/opensparct1.html ). It is available in two "editions" -- Privileged and Hyperprivileged:

• The Privileged edition describes the full Nonprivileged (application software) and Privileged (operating system software) levels of the architecture. It's appropriate for those writing application software, writing a code generator, or writing/porting operating system software to run on top of existing Hypervisor firmware (such as on a SunFire T1000 or T2000 system).
• The Hyperprivileged edition describes the Nonprivileged, Privileged, and Hyperprivileged (hypervisor/virtual machine firmware) levels of the architecture. It adds about 100 pages of low-level details that are invisible to application and O/S software; they're only needed by those writing hyperprivileged firmware ("Hypervisor" code) or designing their own processor based on OpenSPARC.

So, what's new in UltraSPARC Architecture 2005, versus the baseline standard for SPARC architecture, The SPARC Architecture Manual, Version 9? For one thing, the document itself is different. Beyond the obvious formatting differences, the UltraSPARC Architecture specification is more complete and more precise than SPARC V9. For example:

• UA 2005 lists the specific conditions under which each exception may be raised, for every instruction
• UA 2005 clarifies relative trap priorities
• UA 2005 closes many old implementation dependencies

The architecture itself has evolved in many ways; for example:

• Sun's VIS 1 and VIS 2 instructions have been added
• the GSR register has been added
• Hyperprivileged mode has been added (including several hyperprivileged registers, a few hyperprivileged instructions, and effects on the Tcc instruction and the trap model)
• the privileged SIR instruction is now a hyperprivileged instruction
• the privileged VER register is now the hyperprivileged HVER register
• Privileged instructions ALLCLEAN, OTHERW, NORMALW, and INVALW have been added
• An intermediate "zero" state is allowed to be observed by Block Store instructions
• Architectural features are now classified and tagged, to allow smooth architectural evolution (addition and deprecation of features, over the long term)
• There are now two classes of "deferred" traps; SPARC V9 "deferred" traps are now "resumable deferred" traps

My next blog posting, "Intro to UltraSPARC Architecture -- #3", will start diving into the details of these enhancements/changes.

[ T: OpenSPARC ]   [ T: UltraSPARC ]

Posted at 01:14PM May 01, 2006 by dweaver in Sun  |  Comments[3]