Tuesday August 07, 2007 | Sun Sensible Innovative Performance Ideas from Nicolai Kosche |
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DProfile - UltraSPARC T2 Support In Studio 12 Performance Analyzer Today, Sun announced the first true system on a chip with 64 available threads of computation. Sun Studio 12 adds DProfile support for UltraSPARC T2. Activating UltraSPARC T2 objects in Performance Analyzer requires you to create the file .er.rc with the following contents: en_desc on ignore_no_xhwcprof mobj_define Vaddr VADDR mobj_define Paddr PADDR indxobj_define VIRTPC "VIRTPC" indxobj_define PHYSPC "PHYSPC" indxobj_define Process PID indxobj_define Thread (PID*1000)+THRID indxobj_define ThreadID THRID indxobj_define Minutes (TSTAMP/60000000000) mobj_define UST2_Bank (PADDR&0x1c0)>>6 mobj_define UST2_L2DCacheSet (((((PADDR>>15)^PADDR)>>9)&0x1f0) | ((((PADDR>>7)^PADDR)>>9)&0xc) | ((PADDR>>9)&3)) indxobj_define UST2_L2ICacheSet (((((PHYSPC>>15)^PHYSPC)>>9)&0x1f0) | ((((PHYSPC>>7)^PHYSPC)>>9)&0xc) | ((PHYSPC>>9)&3)) mobj_define UST2_L1DataCacheLine (PADDR&0x7f0)>>4 indxobj_define UST2_L1InstrCacheLine (PHYSPC&0x7e0)>>5 indxobj_define UST2_Strand (CPUID) indxobj_define UST2_Core (CPUID&0x38)>>3 mobj_define VA_L2 VADDR>>6 mobj_define VA_L1 VADDR>>4 mobj_define PA_L2 PADDR>>6 mobj_define PA_L1 PADDR>>4 mobj_define Vpage_256M VADDR>>28 mobj_define Ppage_256M PADDR>>28 On UltraSPARC T2 and Sun Studio 12, collect additional information with DProfile. For binaries with large text and large data, use this command (with or without the -y 17 option) to collect L2 cache instruction and data miss information: collect -p +on -h +L2_imiss,on,+L2_dmiss_ld,on -A copy -F on command For binaries with large data usage patterns, but more modest instruction footprint, use these options to collect data-side L1 and L2 miss rates: collect -p +on -h +DC_miss,on,+L2_dmiss_ld,on -A copy -F on command If trapstat reports large TLB miss costs use this command: collect -p +on -h +ITLB_miss,on,+DTLB_miss,on -A copy -F on command ( Aug 07 2007, 12:55:35 PM PDT ) Permalink Comments [0] |
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