x86gentopo - extending DMTF
In order to implement the x86 generic topology enumerator it is necessary to extend the current DMTF SMBIOS specification. This will include defining four (4) OEM-specific Type SMBIOS structures. The intent is to bring these to DMTF to be ratified as either additional structure member(s) to existing structure type(s) (in the case of the first three) or to become a new structure type on it's own (in the case of the last).
These are the four OEM-specific Type structures:
Type 132 (Base Board Extended Information)
| Offset | Name |
Length |
Value |
Description |
| 00h | Type | BYTE |
132 |
Base Board Extended Information indicator |
| 01h | Length | BYTE | 07h | Length of the structure |
| 02h | Handle | WORD | Varies | |
| 04h | Base Board Handle ID |
WORD | Varies | The handle, or instance number, associated with the Base Board structure this extended information belongs to |
| 06h | Part Number |
BYTE | STRING | Number of NULL terminated string that contains the Part Number of this Base Board |
| Un-formed section |
| String #1 |
<Manufacturer's Part Number String> |
Type 134 (Processor Extended Information)
| Offset | Name |
Length |
Value |
Description |
| 00h | Type | BYTE | 134 | Processor Extended Information |
| 01h | Length | BYTE | Varies | Length of the structure, at least 07h |
| 02h | Handle | WORD | Varies | |
| 04h | Processor Handle ID | WORD | Varies | The handle, or instance number, associated with the Processor structure this extended information belongs to |
| 06h | Strand Initial APIC IDs | nWORDs | Varies | List of Initial APIC IDs for all CPU strands. The length is determined from the total number of threads (n) |
Type 136 (Physical Memory Array Extended Information)
| Offset | Name |
Length |
Value |
Description |
| 00h | Type | BYTE | 136 | Phy Mem Array Extended Information indicator |
| 01h | Length | BYTE | 0Ah | Length of the structure |
| 02h | Handle | WORD | Varies | |
| 04h | Phy Mem Array Handle ID |
WORD | Varies | The handle, or instance number, associated with the Phy Mem Array structure this extended information belongs to |
| 06h | BDF | WORD | Varies | The PCI Bus/Dev/Func assigned to this memory controller |
| 08h | Processor Handle |
WORD | Varies | The handle, or instance number, associated with the Processor Socket structure this memory controller resides, or FFFFh if not associated with a processor chip/socket |
Type 138 (PCIE Root Complex/Root Port Information)
| Offset | Name |
Length |
Value |
Description |
| 00h | Type | BYTE | 138 | PCIE RC/RP Information indicator |
| 01h | Length | BYTE | 08h | Length of the structure |
| 02h | Handle | WORD | Varies | |
| 04h | Base Board Handle ID |
WORD | Varies | The handle, or instance number, associated with the base board this PCIE Root Complex/Root Port belongs to. |
| 06h | BDF | WORD | Varies | The PCI Bus/Dev/Func assigned to this PCIE Root Complex/Root Port |
Posted at 05:00PM Jun 15, 2009 by Tom Pothier in Sun | Comments[0]
x86 Generic FMA Topology Enumerator
Well, I've resisted until now - this is my inaugural blog.
Hi, I'm Tom and currently working in the Solaris Platform FMA group. We work on FMA pieces (diagnosis engines, topology enumeration modules, retire agents, etc..) that allow FMA to work on a particular Sun platform.
Currently I'm working on an OpenSolaris x86 generic FMA topology enumerator (http://opensolaris.org/os/project/x86gentopo/). I'll briefly describe this enumerator here and look for the functional and design specifications on our OpenSolaris project page.
The main thrust of this project is to obtain physical topology and all the identity information (serial number, part number, revision, etc...) from a common source - SMBIOS. Physical topology will be derived from contained elements/handles, when available, and structure handle entries which contain an associated structure ID. If a platform contains more than one chassis or base board structure, it will require the use of contained elements/handles in the respective SMBIOS structure . If there is only one chassis and one base board, and contained elements/handles are not supplied, we'll assume the default topology:
/chassis/motherboard/chip
/chassis/motherboard/hostbridge/pciexrc
We'll utilize the x86 chip enumerator (chip.so) to enumerate chip/core/strand as well as memory topology, and the x86 pcibus enumerator (pcibus.so) to enumerate PCI-Express devices.
Most of the required information is part of the DMTF SMBIOS spec version 2.6. There is missing information that we will be requesting DMTF to add to the spec; in the interim we'll use OEM-specific type SMBIOS structures.
There are three main development efforts:
- The x86pi.so x86 FMA plugin which will enumerate up to '/chassis/<base board>/'
- The chip.so x86 FMA plugin chip enumerator will require changes internally to gather it's identity information from SMBIOS.
- The x86 cpu and memory Solaris drivers will need to be enhanced to generate the correct ereport detector and resource fmri.
Posted at 08:27PM May 27, 2009 by Tom Pothier in Sun | Comments[0]