Tuesday December 06, 2005
Tuesday December 06, 2005 You've no doubt heard a lot of noise about a new chip from Sun code-named Niagara. It's Sun's first chip level multiprocessor, with 32 virtual CPUs (threads) on a single chip. But wait, isn't this just another product release on the roadmap? Heck no. This is the dawn of the CMT era, which I believe represents a significant shift in the way we build and deploy massive scale systems. The official name is UltraSPARC T1, but personally I like the code-name Niagara. Today, we released two systems around the Niagara chip, the T1000 and T2000.
I was convinced of the significance of CMT about two years ago by Rick Hetherington, Distinguished engineer and architect of the Niagara based system. I was working with extreme scale web provider here in the bay area, who roles out thousands of web facing servers. So many in fact that they had already concluded that server power consumption was responsible for up to 40% of the cost of running their data center; due to the relationship between power, ac, ups, floorspace and infrastructure costs. I went in with an open mind, considering SPARC (at the time), commodity x86, and a range of low power x86 options. Rick Hetherington and Kunle Olukotun (a founding architect of the chip) started sketching out how much throughput they would expect from their CMT design - 8 1.2GHz cores on a single 60 watt die, which was still being taped out at the time. Being a skeptic, I thew in some what-if questions comparing the throughput from some of the new break away x86 ultra-low power cores, like the AMD Geode or Via EPIA's -- about 1GHz @ 10-20 watts. It turns out that they were right; while the Geodes and EPIAs were much more efficient than commmodity x86, none of these options came close to the throughput per watt and cost per throughput delivered by a single die with many cores. Two years later, it seems so obvious to conclude that the more cores you put on a single die, the greater the savings in both cost and power, and the beginning of the tag-line "cool-threads". Check out Sim Datacenter, a downloadable power simulator for the datacenter.
I'm pleased today to be able to walk you through some of today's Niagara blog entries from the microprocessor, hardware, operating system and application performance teams. There's some great articles on all aspects of the technical details around Niagara:
- Chip level Multithreading - Kunle does a great job of explaining that the transition to CMPs is inevitable in his article. Lawrence Spracklen gives an overview of the next generation CMT processors Jim Laudon, founding Niagara architect gives some good insight into Vertical Threading on Niagara, and has a longer paper on the subject. Ariel Hendel, Distinguished engineer and network architect muses about how CMT challenges thinking about horizontal scale. Our developer network is running a special video session on CMT as it relates to operating systems, applications and developers.
- The T2000 Server - Denis Sheahan gives us a personal insight into the first few moments at power-on with the prototype machines. Fintan Ryan and Robin McDonald show us what this machine looks like from an administrators point of view. Jim Mauro walks through the I/O architecture and capabilities of the T2000: wow, 1.6 Gibabytes per second of I/O from a single chip!
- Application Performance - Forget having to second guess cooked marketing material, you can learn right from our engineers doing the performance work on T2000! Check out Dave's post on Java performance. If you have been wondering about scalability, here is a good summary showing an XML benchmark scaling up to 32 threads. Pallab has some great stories from the trenches as he worked with pilot customers, and some good tips about how optimally configure software. Yufei explores commercial application performance, using SAP. Hugo Rivero talks about the Niagara Cache hierarchy and how it works well with a range of applications. Roch Bourbonnais reports on Directory Server Performance. Brian Doherty talks about how to tune and optimize the JVM. Bharat discusses Web Services. Constantin discusses Niagara as a streaming video server. Keith Bierman discusses several aspects of Niagara. Our mystery performance guy is also blogging about T2000 benchmarks.
- Database Performance - Niagara is actually a great database server. Ravi has some great data showing how we were able to scale up Oracle on Niagara.
- HPC Performance - Ruud Van Der Pas HPC guru talks about using OpenMP to leveage the parallelism of CMT. Marc Hamilton discusses CMT for HPC. Josh Simons carefully points out what not to do.
- Security Performance - Niagara has onboard crypto accellerator, which challenges conventional thinking about security overheads. Chi Chang gives us a walk through the crypto performance of the on board network crypto performance engine and Ning discusses the new Solaris in-kernel SSL proxy.
- Operating Systems and CMT. Phil Harman talks about how CMT significant changes the performance of locking. Andrei talks about Scheduler optimizations in Solaris for CMT. Eric Saxe talks about threading on CMT. Denis Sheahan talks about the 256MB large page support. Sunay introduces networking on CMT.
- Sizing - Allan Packer provides an introduction to sizing applications on Niagara.
- Tools - Nick talks about a radical new tool for profiling data structures and scalability. Denis Sheahan has written an excellent white paper on how to setup and optimize application performance on CMT. Ravi talks about how core-level threading changes how we should interpret utilization and idle time for headroom calculations. Allan shows tools and methodology for workload consolidation on these CMT platforms.
- RAS - Richard Elling talks about why simplicity makes CMT systems ultra reliable.
A hearty congratulations to the whole team who brought this technology together. I've personally observed one of the most significant cross-company collaboration efforts ever -- this technology brought together teams from the microprocessor group, the Solaris kernel group, the JVM, compilers, and application experts all across the company over the past two years, with an enthusiasm level that's hard to put words to.
On a final note, there's two easter eggs: Oracle have just announced that they recognise Niagara as 2 cpu system from a licencing persepective. And, we've Open Sourced SPARC!.
We hope you enjoy exploring CMT and the new Niagara based servers. We'll be opening up a discussion forum shortly, to connect you directly with the developers and application performance experts who work with these systems. Stay Tuned!
[ T: NiagaraCMT OpenSolaris Solaris]
( Dec 06 2005, 12:25:34 PM PST ) Permalink Comments [22]
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Where are the links to the May press releases? Oh, wait, that was Raza Microelectronics with their 8-core, 4-thread MIPS processor. With 4 memory controllers. And 4 GigE + 2 10 GigE... And at 1.5 GHz, not 1.2 GHz. They left off the FPU alltogether, though.
As usual, Sun's not the first, just the noisiest.
Posted by no one on December 07, 2005 at 06:14 PM PST #
Further, it has tons of I/O actually on the die, like the mentioned Gigabit and 10 Gigabit Ethernet ports, and many other. Nice, but without the MMU, to isolate the user programs, probablematic. One run away, and it could take down everything.
So as for running something like Oracle, no. Running a special version of Apache, perhaps. Other embedded uses, sure, (if you need some or all the the embedded I/O).
Posted by Raquel Sanborn on December 11, 2005 at 01:56 PM PST #
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