I took this photograph on our way to Amby Valley, for the Sun India Kickoff, struck by the (unintentional) relevance of the phrase N2 Pressure. The UltraSPARC T2 (codenamed Niagara 2) launch was just a couple of weeks away at the time, and it reminded me of how Throughput Computing applied enormous pressure on other general purpose processor manufacturers to basically change their design approaches.

The UltraSPARC T2 is set to further turn the screws on rivals. The specifications of the 342 square millimetre chip are mind boggling :

Full hardware support for 64 strands or threads
16 integer execution pipelines
08 floating point execution pipelines (with full support for the UltraSPARC VIS extensions)
08 memory pipelines
128KB Instruction Cache (16KB/Core)
64KB Data Cache (8KB/Core)
A Core x L2 Cache crossbar (180GB/s read and 90GB/s write, meaning we would make iTunes load claims too, if we didn't blush when making them)
04 MB L2 Cache
04 memory controllers
08 cryptographic co-processing units
An 8 Lane PCI-Ex Controller
02 1/10 Gigabit Ethernet Controllers

Like the French are wont to say, Le microprocesseur est mort, Vive le microsystem! All of this consumes less than 95 Watts at peak when operating at 1.4GHz. Less than 1.5 Watts per thread.

The combination of a system with the chip, Logical Domains and Solaris Containers make for a compelling virtualization platform to run application workloads that are thread rich. We are told, by IBM and by HP (surprise! surprise!), that this will be applicable only in some niche markets. I expect to hear soon that they will be exiting the transactional processing niche market and the network computing niche market and the ERP niche market and the ...

HP also puzzlingly called the Niagara platform a proprietary architecture. On second thoughts, since they feel that the Internet market is a niche, the maker of industry standard platforms might not have come across the OpenSPARC website. Jokes apart, the UltraSPARC T1 based systems were the fastest ramping products in Sun's history, and that might be only the first step for Niagara-kind.

Small wonder that when John Hennessy and David Patterson were putting together the fourth edition of the classic Computer Architecture : A Quantitative Approach, the UltraSPARC T1 was one of two contemporary processors (The AMD Opteron was the other) to feature in the case studies.

Tags : SPARC Niagara2