Write Combining Support for Xorg
As we have known, Solaris does not export MTRR interfaces to user level applications. So PAT is used for write combing support for Xorg. Let's verified it by mdb.
1). Start solaris and Xorg.
2). Make sure solaris dumps all the pages beside kernel pages. dumpadm -c all
3). Reboot the solaris and get the dump core files reboot -d
4). mdb -k 0. Suppose your core files are "unix.0" and "vmcore.0".
5). find the pid of Xorg ::ps ! grep Xorg
Here I got "100777".
6). get the HAT table of the Xorg 0t100777 ::pid2proc |::print proc_t p_as->a_hat
Here I got "0xceb7d140".
7). dump the all the page table entries 0xceb7d140::htables | ::print struct htable ht_pfn |::ptable
8). From the Xorg log, we can get the physical range of frame buffer. ... Linear framebuffer at 0xF0000000 ...
9). Search "0xF0000000" in the page table entries. Got these.
...
[722] va=b4800000 pte=f00004f7: pfn=0xf0000 noconsist largepage mod ref user write uncached
[723] va=b4c00000 pte=f04004f7: pfn=0xf0400 noconsist largepage mod ref user write uncached
[724] va=b5000000 pte=f08004f7: pfn=0xf0800 noconsist largepage mod ref user write uncached
[725] va=b5400000 pte=f0c004f7: pfn=0xf0c00 noconsist largepage mod ref user write uncached
[745] va=ba400000 pte=f5c004f7: pfn=0xf5c00 noconsist largepage mod ref user write uncached
...
10).In solairs the PAT/PWT/PCD values are setup so that:
PAT & PWT -> Write Protected
PAT & PCD -> Write Combining PAT by itself (PWT == 0 && PCD ==0) fields uncac0hables (same as PCD == 1) 0x04f7 = 0x0000010011110111
^ ^^
| ||_____________________________________________PAT 0 should be 1??
| |____________________________PCD 1
|________________PWT 0
for large pages Bit 12: PAT Bit 4: PCD Bit 3: PWT Any thing wrong here?
